Design Rules Available for PCB Layout in Altium Designer

Your Altium Design Software's PCB Editor uses the concept of Design Rules to define the requirements of a design. These rules collectively form an 'instruction set' for the PCB Editor to follow. They cover every aspect of the design - from routing widths, clearances, plane connection styles, routing via styles, and so on - and many of the rules can be monitored in real-time by the online Design Rule Checker (DRC).

Design rules target specific objects and are applied in a hierarchical fashion. Multiple rules of the same type can be set up. It may arise that a design object is covered by more than one rule with the same scope. In this instance, a contention exists. All contentions are resolved by a priority setting. The system goes through the rules from highest to lowest priority and picks the first one whose scope(s) match the object(s) being checked.

With a well-defined set of design rules, you can successfully complete board designs with varying and often stringent design requirements. And as the PCB Editor is rules-driven, taking the time to set up the rules at the outset of the design will enable you to effectively get on with the job of designing, safe in the knowledge that the rules system is working hard to ensure that success.

The Design Rules are divided into separate categories to make it easier to locate and configure your desired rules (s). The categories and their specific rules are listed below.

Electrical Rules

• Clearance
• Short-Circuit
• Un-Routed Net
• Un-Connected Pins
• Modified Polygon
• Creepage Distance

Routing Rules

• Width
• Routing Topology
• Routing Priority
• Routing Layers
• Routing Corners
• Routing Via Style
• Fanout Control
• Differential Pairs Routing

SMT Rules

• SMD To Corner
• SMD To Plane
• SMD Neck-Down
• SMD Entry

Mask Rules

• Solder Mask Expansion
• Paste Mask Expansion

Plane Rules

• Power Plane Connect Style
• Power Plane Clearance
• Polygon Connect Style

Testpoint Rules

• Fabrication and Assembly Testpoint Style
• Fabrication and Assembly Testpoint Usage

Manufacturing Rules

• Minimum Annular Ring
• Acute Angle
• Hole Size
• Layer Pairs
• Hole To Hole Clearance
• Minimum Solder Mask Sliver
• Silk To Silk Solder Mask Clearance
• Silk To Silk Clearance
• Net Antennae
• Board Outline Clearance

High Speed Rules

• Parallel Segment
• Length
• Matched Lengths
• Daisy Chain Stub Length
• Vias Under SMD
• Maximum Via Count
• Max Via Stub Length (Back Drilling)
• Return Path

Placement Rules

• Room Definition
• Component Clearance
• Component Orientations
• Permitted Layers
• Nets to Ignore
• Height

Signal Integrity Rules

• Signal Stimulus
• Overshoot - Falling Edge
• Overshoot - Rising Edge
• Undershoot - Falling Edge
• Undershoot - Rising Edge
• Impedance
• Signal Top Value
• Signal Base Value
• Flight Time - Rising Edge
• Flight Time - Falling Edge
• Slope - Rising Edge
• Slope - Falling Edge
• Supply Nets