Use Altium Designer "Parallel Segment" high-speed design rule to avoid the adjacent layer parallel track routing.
Layer Checking - specifies where the two track segments to be checked should reside:
Same Layer - the track segments for the targeted nets are both on the same layer
Adjacent Layers - the track segments for the targeted nets are on adjacent layers.
For a parallel gap of - specifies the parallel gap that should exist between two track segments before they can be considered for test.
The parallel limit is - specifies the maximum permissible parallel length of two track segments (on different nets), when the parallel gap constraint is observed over the entire length.